STA Engineer

HCLTech is looking for an experienced STA Engineer to join our rapidly growing team in Ahmedabad, Gujarat. This role is ideal for professionals with a solid background in Static Timing Analysis within the VLSI and semiconductor industry. As an STA Engineer, you will be instrumental in ensuring the timing closure of complex integrated circuits, collaborating closely with physical design and RTL teams.

Key Responsibilities

• Perform comprehensive static timing analysis on digital circuits using industry-standard tools.
• Identify and debug timing violations and provide effective solutions.
• Generate and analyze timing reports, sign-off reports, and power analysis data.
• Collaborate with physical design engineers to optimize layout for timing performance.
• Work with RTL designers to understand design constraints and functional requirements.
• Develop and implement timing constraints for complex SoC designs.
• Participate in design reviews and provide timing closure guidance.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Electronics, or a related discipline.
• Minimum of 2 years of hands-on experience in Static Timing Analysis (STA).
• Strong proficiency with STA tools from leading EDA vendors.
• In-depth knowledge of timing concepts, signal integrity, and process variations.
• Experience with timing closure of large-scale ASICs/SoCs.
• Familiarity with scripting languages such as Tcl or Python is highly desirable.
• Excellent problem-solving and analytical skills.

What We Offer

• Opportunity to work on cutting-edge VLSI projects.
• A collaborative and innovative work environment.
• Continuous learning and career advancement opportunities.
• Exposure to advanced semiconductor technologies.