Staff CPU Subsystem Design Verification Engineer

Are you an accomplished Verification Engineer with a passion for cutting-edge semiconductor technology? Juntran Tech is actively seeking a highly skilled and experienced Verification Engineer to join our dynamic team. This full-time role offers an exciting opportunity to contribute to the development of complex IP-level designs, utilizing your expertise in Verilog, SystemVerilog, and UVM. If you thrive in a challenging environment and are eager to push the boundaries of verification methodologies, we invite you to explore this pivotal position located in the vibrant tech hubs of Bangalore or Hyderabad.

As a key member of our engineering team, the Verification Engineer will play a crucial role in ensuring the functional correctness and robustness of our next-generation IP cores. You will be instrumental in developing comprehensive verification strategies, building sophisticated testbenches, and driving the verification closure process. This role is perfect for an individual who is not only proficient in core verification languages and methodologies but also possesses a strong understanding of scripting and automation to enhance efficiency.

Key Responsibilities

• Design, develop, and implement advanced IP-Level Testbenches using industry-standard methodologies such as UVM.
• Create detailed verification plans, test specifications, and test cases for complex digital designs.
• Execute verification campaigns, debug design and testbench issues, and analyze coverage metrics to achieve verification closure.
• Utilize leading EDA tools, including VCS and Verdi, for simulation, waveform analysis, and debug.
• Develop and maintain scripting and automation flows to improve verification efficiency and productivity.
• Collaborate closely with design architects and RTL engineers to understand design specifications and resolve functional issues.
• Participate in design reviews, verification reviews, and provide valuable feedback to improve overall design quality.
• Document verification environments, test plans, and results thoroughly for future reference and compliance.

Requirements

• A Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
• Minimum of 5 years of hands-on experience in ASIC/IP verification.
• Proficiency in hardware description languages (HDL) such as Verilog and advanced verification languages like SystemVerilog.
• Extensive experience with Universal Verification Methodology (UVM) for building reusable and scalable testbenches.
• Demonstrable experience in IP-Level Testbench Development and complete verification cycles.
• Strong working knowledge of industry-standard EDA tools, specifically VCS and Verdi.
• Solid scripting skills (e.g., Perl, Python, Tcl) for verification automation and flow development.
• Excellent problem-solving abilities, strong analytical skills, and attention to detail.
• Ability to work effectively both independently and as part of a collaborative team.

What We Offer

• An opportunity to work on cutting-edge semiconductor technologies and innovative projects.
• A collaborative and supportive work environment that fosters learning and professional growth.
• Exposure to advanced verification methodologies and tools.
• Competitive compensation packages commensurate with experience and skills.
• A chance to make a significant impact on product development and contribute to company success.

If you are a motivated Verification Engineer ready to take on challenging projects and contribute to a leading-edge technology company, we encourage you to apply. Join Juntran Tech and become a part of a team that is shaping the future of digital design verification.